BCS302 Digital Design and Computer Organization
Course Learning Objectives
CLO 1. To demonstrate the functionalities of binary logic system.
CLO 2. To explain the working of combinational and sequential logic system.
CLO 3. To realize the basic structure of computer system. CLO 4. To illustrate the working of I/O operations and processing unit
SYLLABUS COPY
MODULE - 1
Introduction to Digital Design: Binary Logic, Basic Theorems And Properties Of Boolean Algebra, Boolean Functions, Digital Logic Gates, Introduction, The Map Method, Four Variable Map, Don’t-Care Conditions, NAND and NOR Implementation, Other Hardware Description Language – Verilog Model of a simple circuit.
MODULE - 2
Combinational Logic: Introduction, Combinational Circuits, Design Procedure, Binary Adder-Subtractor, Decoders, Encoders, Multiplexers. HDL Models of Combinational Circuits –Adder, Multiplexer, Encoder.
Sequential Logic: Introduction, Sequential Circuits, Storage Elements: Latches, Flip-Flops.
MODULE - 3
Basic Structure of Computers: Functional Units, Basic Operational Concepts, Bus structure, Performance – Processor Clock, Basic Performance Equation, Clock Rate, Performance Measurement.
Machine Instructions and Programs: Memory Location and Addresses, Memory Operations, Instruction and Instruction sequencing, Addressing Modes.
MODULE - 4
Input/output Organization: Accessing I/O Devices, Interrupts – Interrupt Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, Direct Memory Access: Bus Arbitration, Speed, size and Cost of memory systems. Cache Memories – Mapping Functions.
MODULE - 5
Basic Processing Unit: Some Fundamental Concepts: Register Transfers, Performing ALU operations, fetching a word from Memory, Storing a word in memory. Execution of a Complete Instruction.
Pipelining: Basic concepts, Role of Cache memory, Pipeline Performance.
Course outcome
At the end of the course the student will be able to:
CO 1. Apply the K–Map techniques to simplify various Boolean expressions.
CO 2. Design different types of combinational and sequential circuits along with Verilog programs.
CO 3. Describe the fundamentals of machine instructions, addressing modes and Processor performance.
CO 4. Explain the approaches involved in achieving communication between processor and I/O devices.
CO 5. Analyze internal Organization of Memory and Impact of cache/Pipelining on Processor Performance.
Suggested Learning Resources
Text Books
1. M. Morris Mano & Michael D. Ciletti, Digital Design With an Introduction to Verilog Design, 5e, Pearson Education.
2. Carl Hamacher, ZvonkoVranesic, SafwatZaky, Computer Organization, 5th Edition, Tata McGraw Hill.